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[PULL 05/27] target/arm: Consolidate ifdef blocks in reset
From: |
Peter Maydell |
Subject: |
[PULL 05/27] target/arm: Consolidate ifdef blocks in reset |
Date: |
Mon, 20 Sep 2021 15:19:25 +0100 |
Move an ifndef CONFIG_USER_ONLY code block up in arm_cpu_reset() so
it can be merged with another earlier one.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210914120725.24992-4-peter.maydell@linaro.org
---
target/arm/cpu.c | 22 ++++++++++------------
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1dff1d33473..30e2cb9224d 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -265,6 +265,16 @@ static void arm_cpu_reset(DeviceState *dev)
env->uncached_cpsr = ARM_CPU_MODE_SVC;
}
env->daif = PSTATE_D | PSTATE_A | PSTATE_I | PSTATE_F;
+
+ /* AArch32 has a hard highvec setting of 0xFFFF0000. If we are currently
+ * executing as AArch32 then check if highvecs are enabled and
+ * adjust the PC accordingly.
+ */
+ if (A32_BANKED_CURRENT_REG_GET(env, sctlr) & SCTLR_V) {
+ env->regs[15] = 0xFFFF0000;
+ }
+
+ env->vfp.xregs[ARM_VFP_FPEXC] = 0;
#endif
if (arm_feature(env, ARM_FEATURE_M)) {
@@ -372,18 +382,6 @@ static void arm_cpu_reset(DeviceState *dev)
#endif
}
-#ifndef CONFIG_USER_ONLY
- /* AArch32 has a hard highvec setting of 0xFFFF0000. If we are currently
- * executing as AArch32 then check if highvecs are enabled and
- * adjust the PC accordingly.
- */
- if (A32_BANKED_CURRENT_REG_GET(env, sctlr) & SCTLR_V) {
- env->regs[15] = 0xFFFF0000;
- }
-
- env->vfp.xregs[ARM_VFP_FPEXC] = 0;
-#endif
-
/* M profile requires that reset clears the exclusive monitor;
* A profile does not, but clearing it makes more sense than having it
* set with an exclusive access on address zero.
--
2.20.1
- [PULL 00/27] target-arm queue, Peter Maydell, 2021/09/20
- [PULL 03/27] target/arm: Don't skip M-profile reset entirely in user mode, Peter Maydell, 2021/09/20
- [PULL 06/27] hw/intc: Set GIC maintenance interrupt level to only 0 or 1, Peter Maydell, 2021/09/20
- [PULL 04/27] target/arm: Always clear exclusive monitor on reset, Peter Maydell, 2021/09/20
- [PULL 07/27] arm: Move PMC register definitions to internals.h, Peter Maydell, 2021/09/20
- [PULL 12/27] hvf: arm: Implement -cpu host, Peter Maydell, 2021/09/20
- [PULL 10/27] hvf: Add Apple Silicon support, Peter Maydell, 2021/09/20
- [PULL 01/27] elf2dmp: Check curl_easy_setopt() return value, Peter Maydell, 2021/09/20
- [PULL 09/27] hvf: Introduce hvf_arch_init() callback, Peter Maydell, 2021/09/20
- [PULL 08/27] hvf: Add execute to dirty log permission bitmap, Peter Maydell, 2021/09/20
- [PULL 05/27] target/arm: Consolidate ifdef blocks in reset,
Peter Maydell <=
- [PULL 11/27] arm/hvf: Add a WFI handler, Peter Maydell, 2021/09/20
- [PULL 13/27] hvf: arm: Implement PSCI handling, Peter Maydell, 2021/09/20
- [PULL 15/27] hvf: arm: Add rudimentary PMC support, Peter Maydell, 2021/09/20
- [PULL 20/27] target/arm: Optimize MVE arithmetic ops, Peter Maydell, 2021/09/20
- [PULL 21/27] target/arm: Optimize MVE VNEG, VABS, Peter Maydell, 2021/09/20
- [PULL 24/27] target/arm: Optimize MVE VSHL, VSHR immediate forms, Peter Maydell, 2021/09/20
- [PULL 16/27] target/arm: Avoid goto_tb if we're trying to exit to the main loop, Peter Maydell, 2021/09/20
- [PULL 26/27] target/arm: Optimize MVE VSLI and VSRI, Peter Maydell, 2021/09/20
- [PULL 19/27] target/arm: Optimize MVE logic ops, Peter Maydell, 2021/09/20
- [PULL 17/27] target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migration, Peter Maydell, 2021/09/20