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[PATCH v5 10/31] target/arm: Restrict has_work() handler to sysemu and T
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v5 10/31] target/arm: Restrict has_work() handler to sysemu and TCG |
Date: |
Mon, 20 Sep 2021 23:44:26 +0200 |
Restrict has_work() to TCG sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/arm/cpu.c | 7 +++++--
target/arm/cpu_tcg.c | 2 +-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ba0741b20e4..e11aa625a5f 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -73,8 +73,8 @@ void arm_cpu_synchronize_from_tb(CPUState *cs,
env->regs[15] = tb->pc;
}
}
-#endif /* CONFIG_TCG */
+#ifndef CONFIG_USER_ONLY
static bool arm_cpu_has_work(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
@@ -85,6 +85,9 @@ static bool arm_cpu_has_work(CPUState *cs)
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
| CPU_INTERRUPT_EXITTB);
}
+#endif /* !CONFIG_USER_ONLY */
+
+#endif /* CONFIG_TCG */
void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque)
@@ -2017,6 +2020,7 @@ static const struct TCGCPUOps arm_tcg_ops = {
.debug_excp_handler = arm_debug_excp_handler,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = arm_cpu_has_work,
.cpu_exec_interrupt = arm_cpu_exec_interrupt,
.do_interrupt = arm_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
@@ -2041,7 +2045,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
device_class_set_parent_reset(dc, arm_cpu_reset, &acc->parent_reset);
cc->class_by_name = arm_cpu_class_by_name;
- cc->has_work = arm_cpu_has_work;
cc->dump_state = arm_cpu_dump_state;
cc->set_pc = arm_cpu_set_pc;
cc->gdb_read_register = arm_cpu_gdb_read_register;
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c
index da348938407..a3df208249a 100644
--- a/target/arm/cpu_tcg.c
+++ b/target/arm/cpu_tcg.c
@@ -907,6 +907,7 @@ static const struct TCGCPUOps arm_v7m_tcg_ops = {
.debug_excp_handler = arm_debug_excp_handler,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = arm_v7m_cpu_has_work,
.cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt,
.do_interrupt = arm_v7m_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
@@ -925,7 +926,6 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
acc->info = data;
#ifdef CONFIG_TCG
- cc->has_work = arm_v7m_cpu_has_work;
cc->tcg_ops = &arm_v7m_tcg_ops;
#endif /* CONFIG_TCG */
--
2.31.1
- Re: [PATCH v5 05/31] sysemu: Introduce AccelOpsClass::has_work(), (continued)
- [PATCH v5 06/31] accel/kvm: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 07/31] accel/whpx: Implement AccelOpsClass::has_work(), Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 11/31] target/avr: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 12/31] target/cris: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 08/31] accel/tcg: Implement AccelOpsClass::has_work() as stub, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 10/31] target/arm: Restrict has_work() handler to sysemu and TCG,
Philippe Mathieu-Daudé <=
- [PATCH v5 09/31] target/alpha: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 13/31] target/hexagon: Remove unused has_work() handler, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 14/31] target/hppa: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 15/31] target/i386: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 16/31] target/m68k: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 17/31] target/microblaze: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 18/31] target/mips: Restrict has_work() handler to sysemu and TCG, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 19/31] target/nios2: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20
- [PATCH v5 20/31] target/openrisc: Restrict has_work() handler to sysemu, Philippe Mathieu-Daudé, 2021/09/20