Re: [PATCH v5 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops

[Philippe Mathieu-Daudé]

On 9/24/21 19:25, WANG Xuerui wrote:
> Signed-off-by: WANG Xuerui <git@xen0n.name>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   tcg/loongarch64/tcg-target-con-set.h |  1 +
>   tcg/loongarch64/tcg-target.c.inc     | 91 ++++++++++++++++++++++++++++
>   tcg/loongarch64/tcg-target.h         |  4 +-
>   3 files changed, 94 insertions(+), 2 deletions(-)

> diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
> index 1ab690bab6..32676e83af 100644
> --- a/tcg/loongarch64/tcg-target.c.inc
> +++ b/tcg/loongarch64/tcg-target.c.inc
> @@ -580,6 +580,85 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
>           tcg_out_clzctz(s, OPC_CTZ_D, a0, a1, a2, c2, false);
>           break;
>   
> +    case INDEX_op_shl_i32:
> +        if (c2) {

Why can't we use:

               tcg_debug_assert(a2 <= 0x1f);
               tcg_out_opc_slli_w(s, a0, a1, a2);

?

> +            tcg_out_opc_slli_w(s, a0, a1, a2 & 0x1f);
> +        } else {
> +            tcg_out_opc_sll_w(s, a0, a1, a2);
> +        }
> +        break;