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[PULL 23/23] target/arm: read access to performance counters from EL0
From: |
Peter Maydell |
Subject: |
[PULL 23/23] target/arm: read access to performance counters from EL0 |
Date: |
Thu, 5 May 2022 10:11:47 +0100 |
From: Alex Zuepke <alex.zuepke@tum.de>
The ARMv8 manual defines that PMUSERENR_EL0.ER enables read-access
to both PMXEVCNTR_EL0 and PMEVCNTR<n>_EL0 registers, however,
we only use it for PMXEVCNTR_EL0. Extend to PMEVCNTR<n>_EL0 as well.
Signed-off-by: Alex Zuepke <alex.zuepke@tum.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220428132717.84190-1-alex.zuepke@tum.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 14ea5caad94..b4daf4f0761 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6639,10 +6639,10 @@ static void define_pmu_regs(ARMCPU *cpu)
.crm = 8 | (3 & (i >> 3)), .opc1 = 0, .opc2 = i & 7,
.access = PL0_RW, .type = ARM_CP_IO | ARM_CP_ALIAS,
.readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn,
- .accessfn = pmreg_access },
+ .accessfn = pmreg_access_xevcntr },
{ .name = pmevcntr_el0_name, .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .crn = 14, .crm = 8 | (3 & (i >> 3)),
- .opc2 = i & 7, .access = PL0_RW, .accessfn = pmreg_access,
+ .opc2 = i & 7, .access = PL0_RW, .accessfn =
pmreg_access_xevcntr,
.type = ARM_CP_IO,
.readfn = pmevcntr_readfn, .writefn = pmevcntr_writefn,
.raw_readfn = pmevcntr_rawread,
--
2.25.1
- [PULL 15/23] target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable, (continued)
- [PULL 15/23] target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 11/23] target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases, Peter Maydell, 2022/05/05
- [PULL 17/23] target/arm: Hoist isbanked computation in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 18/23] target/arm: Perform override check early in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 19/23] target/arm: Reformat comments in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 12/23] target/arm: Store cpregs key in the hash table directly, Peter Maydell, 2022/05/05
- [PULL 14/23] target/arm: Hoist computation of key in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 16/23] target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 20/23] target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable, Peter Maydell, 2022/05/05
- [PULL 22/23] target/arm: Add isar_feature_{aa64,any}_ras, Peter Maydell, 2022/05/05
- [PULL 23/23] target/arm: read access to performance counters from EL0,
Peter Maydell <=
- [PULL 21/23] target/arm: Add isar predicates for FEAT_Debugv8p2, Peter Maydell, 2022/05/05
- Re: [PULL 00/23] target-arm queue, Richard Henderson, 2022/05/05