Re: [PULL 00/23] target-arm queue

[Richard Henderson]

On 5/5/22 04:11, Peter Maydell wrote:
> Two small bugfixes, plus most of RTH's refactoring of cpregs
> handling.
>
> -- PMM
>
> The following changes since commit 1fba9dc71a170b3a05b9d3272dd8ecfe7f26e215:
>
>    Merge tag 'pull-request-2022-05-04' of https://gitlab.com/thuth/qemu into 
> staging (2022-05-04 08:07:02 -0700)
>
> are available in the Git repository at:
>
>    https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20220505
>
> for you to fetch changes up to 99a50d1a67c602126fc2b3a4812d3000eba9bf34:
>
>    target/arm: read access to performance counters from EL0 (2022-05-05 
> 09:36:22 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>   * Enable read access to performance counters from EL0
>   * Enable SCTLR_EL1.BT0 for aarch64-linux-user
>   * Refactoring of cpreg handling

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as 
appropriate.


r~




> ----------------------------------------------------------------
> Alex Zuepke (1):
>        target/arm: read access to performance counters from EL0
>
> Richard Henderson (22):
>        target/arm: Enable SCTLR_EL1.BT0 for aarch64-linux-user
>        target/arm: Split out cpregs.h
>        target/arm: Reorg CPAccessResult and access_check_cp_reg
>        target/arm: Replace sentinels with ARRAY_SIZE in cpregs.h
>        target/arm: Make some more cpreg data static const
>        target/arm: Reorg ARMCPRegInfo type field bits
>        target/arm: Avoid bare abort() or assert(0)
>        target/arm: Change cpreg access permissions to enum
>        target/arm: Name CPState type
>        target/arm: Name CPSecureState type
>        target/arm: Drop always-true test in define_arm_vh_e2h_redirects_aliases
>        target/arm: Store cpregs key in the hash table directly
>        target/arm: Merge allocation of the cpreg and its name
>        target/arm: Hoist computation of key in add_cpreg_to_hashtable
>        target/arm: Consolidate cpreg updates in add_cpreg_to_hashtable
>        target/arm: Use bool for is64 and ns in add_cpreg_to_hashtable
>        target/arm: Hoist isbanked computation in add_cpreg_to_hashtable
>        target/arm: Perform override check early in add_cpreg_to_hashtable
>        target/arm: Reformat comments in add_cpreg_to_hashtable
>        target/arm: Remove HOST_BIG_ENDIAN ifdef in add_cpreg_to_hashtable
>        target/arm: Add isar predicates for FEAT_Debugv8p2
>        target/arm: Add isar_feature_{aa64,any}_ras
>
>   target/arm/cpregs.h               | 453 ++++++++++++++++++++++++++++++++++++++
>   target/arm/cpu.h                  | 393 +++------------------------------
>   hw/arm/pxa2xx.c                   |   2 +-
>   hw/arm/pxa2xx_pic.c               |   2 +-
>   hw/intc/arm_gicv3_cpuif.c         |   6 +-
>   hw/intc/arm_gicv3_kvm.c           |   3 +-
>   target/arm/cpu.c                  |  25 +--
>   target/arm/cpu64.c                |   2 +-
>   target/arm/cpu_tcg.c              |   5 +-
>   target/arm/gdbstub.c              |   5 +-
>   target/arm/helper.c               | 358 +++++++++++++-----------------
>   target/arm/hvf/hvf.c              |   2 +-
>   target/arm/kvm-stub.c             |   4 +-
>   target/arm/kvm.c                  |   4 +-
>   target/arm/machine.c              |   4 +-
>   target/arm/op_helper.c            |  57 ++---
>   target/arm/translate-a64.c        |  14 +-
>   target/arm/translate-neon.c       |   2 +-
>   target/arm/translate.c            |  13 +-
>   tests/tcg/aarch64/bti-3.c         |  42 ++++
>   tests/tcg/aarch64/Makefile.target |   6 +-
>   21 files changed, 738 insertions(+), 664 deletions(-)
>   create mode 100644 target/arm/cpregs.h
>   create mode 100644 tests/tcg/aarch64/bti-3.c