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[PULL 051/117] target/arm: Move sve check into do_index
From: |
Peter Maydell |
Subject: |
[PULL 051/117] target/arm: Move sve check into do_index |
Date: |
Mon, 30 May 2022 17:06:02 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-49-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-sve.c | 53 ++++++++++++++++++--------------------
1 file changed, 25 insertions(+), 28 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 52bbd1a4faa..44c23429232 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -1087,12 +1087,20 @@ TRANS_FEAT(MLS, aa64_sve, do_zpzzz_ool, a,
mls_fns[a->esz])
*** SVE Index Generation Group
*/
-static void do_index(DisasContext *s, int esz, int rd,
+static bool do_index(DisasContext *s, int esz, int rd,
TCGv_i64 start, TCGv_i64 incr)
{
- unsigned vsz = vec_full_reg_size(s);
- TCGv_i32 desc = tcg_constant_i32(simd_desc(vsz, vsz, 0));
- TCGv_ptr t_zd = tcg_temp_new_ptr();
+ unsigned vsz;
+ TCGv_i32 desc;
+ TCGv_ptr t_zd;
+
+ if (!sve_access_check(s)) {
+ return true;
+ }
+
+ vsz = vec_full_reg_size(s);
+ desc = tcg_constant_i32(simd_desc(vsz, vsz, 0));
+ t_zd = tcg_temp_new_ptr();
tcg_gen_addi_ptr(t_zd, cpu_env, vec_full_reg_offset(s, rd));
if (esz == 3) {
@@ -1115,46 +1123,35 @@ static void do_index(DisasContext *s, int esz, int rd,
tcg_temp_free_i32(i32);
}
tcg_temp_free_ptr(t_zd);
+ return true;
}
static bool trans_INDEX_ii(DisasContext *s, arg_INDEX_ii *a)
{
- if (sve_access_check(s)) {
- TCGv_i64 start = tcg_constant_i64(a->imm1);
- TCGv_i64 incr = tcg_constant_i64(a->imm2);
- do_index(s, a->esz, a->rd, start, incr);
- }
- return true;
+ TCGv_i64 start = tcg_constant_i64(a->imm1);
+ TCGv_i64 incr = tcg_constant_i64(a->imm2);
+ return do_index(s, a->esz, a->rd, start, incr);
}
static bool trans_INDEX_ir(DisasContext *s, arg_INDEX_ir *a)
{
- if (sve_access_check(s)) {
- TCGv_i64 start = tcg_constant_i64(a->imm);
- TCGv_i64 incr = cpu_reg(s, a->rm);
- do_index(s, a->esz, a->rd, start, incr);
- }
- return true;
+ TCGv_i64 start = tcg_constant_i64(a->imm);
+ TCGv_i64 incr = cpu_reg(s, a->rm);
+ return do_index(s, a->esz, a->rd, start, incr);
}
static bool trans_INDEX_ri(DisasContext *s, arg_INDEX_ri *a)
{
- if (sve_access_check(s)) {
- TCGv_i64 start = cpu_reg(s, a->rn);
- TCGv_i64 incr = tcg_constant_i64(a->imm);
- do_index(s, a->esz, a->rd, start, incr);
- }
- return true;
+ TCGv_i64 start = cpu_reg(s, a->rn);
+ TCGv_i64 incr = tcg_constant_i64(a->imm);
+ return do_index(s, a->esz, a->rd, start, incr);
}
static bool trans_INDEX_rr(DisasContext *s, arg_INDEX_rr *a)
{
- if (sve_access_check(s)) {
- TCGv_i64 start = cpu_reg(s, a->rn);
- TCGv_i64 incr = cpu_reg(s, a->rm);
- do_index(s, a->esz, a->rd, start, incr);
- }
- return true;
+ TCGv_i64 start = cpu_reg(s, a->rn);
+ TCGv_i64 incr = cpu_reg(s, a->rm);
+ return do_index(s, a->esz, a->rd, start, incr);
}
/*
--
2.25.1
- [PULL 082/117] target/arm: Move sve check into gen_gvec_fn_ppp, (continued)
- [PULL 082/117] target/arm: Move sve check into gen_gvec_fn_ppp, Peter Maydell, 2022/05/30
- [PULL 084/117] target/arm: Use TRANS_FEAT for SEL_zpzz, Peter Maydell, 2022/05/30
- [PULL 086/117] target/arm: Use TRANS_FEAT for FMLA, Peter Maydell, 2022/05/30
- [PULL 092/117] target/arm: Move null function and sve check into do_reduce, Peter Maydell, 2022/05/30
- [PULL 064/117] target/arm: Use TRANS_FEAT for do_clast_fp, Peter Maydell, 2022/05/30
- [PULL 075/117] target/arm: Reject add/sub w/ shifted byte early, Peter Maydell, 2022/05/30
- [PULL 080/117] target/arm: Introduce gen_gvec_{ptr,fpst}_zzzz, Peter Maydell, 2022/05/30
- [PULL 027/117] target/arm: Use TRANS_FEAT for gen_gvec_ool_arg_zpzi, Peter Maydell, 2022/05/30
- [PULL 079/117] target/arm: Use TRANS_FEAT for do_zzi_ool, Peter Maydell, 2022/05/30
- [PULL 087/117] target/arm: Use TRANS_FEAT for BFMLA, Peter Maydell, 2022/05/30
- [PULL 051/117] target/arm: Move sve check into do_index,
Peter Maydell <=
- [PULL 066/117] target/arm: Use TRANS_FEAT for do_last_fp, Peter Maydell, 2022/05/30
- [PULL 072/117] target/arm: Use TRANS_FEAT for do_brk2, do_brk3, Peter Maydell, 2022/05/30
- [PULL 071/117] target/arm: Use TRANS_FEAT for do_ppzi_flags, Peter Maydell, 2022/05/30
- [PULL 076/117] target/arm: Reject copy w/ shifted byte early, Peter Maydell, 2022/05/30
- [PULL 081/117] target/arm: Use TRANS_FEAT for FMMLA, Peter Maydell, 2022/05/30
- [PULL 099/117] target/arm: Use TRANS_FEAT for FLOGB, Peter Maydell, 2022/05/30
- [PULL 065/117] target/arm: Use TRANS_FEAT for do_clast_general, Peter Maydell, 2022/05/30
- [PULL 085/117] target/arm: Use TRANS_FEAT for MOVPRFX, Peter Maydell, 2022/05/30
- [PULL 089/117] target/arm: Use TRANS_FEAT for DO_FP3, Peter Maydell, 2022/05/30
- [PULL 097/117] target/arm: Move null function and sve check into do_frint_mode, Peter Maydell, 2022/05/30