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[PATCH v2 23/66] target/arm: Add TBFLAG_M32.SECURE
From: |
Richard Henderson |
Subject: |
[PATCH v2 23/66] target/arm: Add TBFLAG_M32.SECURE |
Date: |
Mon, 22 Aug 2022 08:26:58 -0700 |
Remove the use of regime_is_secure from arm_tr_init_disas_context.
Instead, provide the value of v8m_secure directly from tb_flags.
Rather than use regime_is_secure, use the env->v7m.secure directly,
as per arm_mmu_idx_el.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 2 ++
target/arm/helper.c | 4 ++++
target/arm/translate.c | 3 +--
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 5168e3d837..ee94d8e653 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3192,6 +3192,8 @@ FIELD(TBFLAG_M32, NEW_FP_CTXT_NEEDED, 3, 1) /* Not
cached. */
FIELD(TBFLAG_M32, FPCCR_S_WRONG, 4, 1) /* Not cached. */
/* Set if MVE insns are definitely not predicated by VPR or LTPSIZE */
FIELD(TBFLAG_M32, MVE_NO_PRED, 5, 1) /* Not cached. */
+/* Set if in secure mode */
+FIELD(TBFLAG_M32, SECURE, 6, 1)
/*
* Bit usage when in AArch64 state
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 68373bc0a9..1fcfc85b76 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -10764,6 +10764,10 @@ static CPUARMTBFlags rebuild_hflags_m32(CPUARMState
*env, int fp_el,
DP_TBFLAG_M32(flags, STACKCHECK, 1);
}
+ if (arm_feature(env, ARM_FEATURE_M_SECURITY) && env->v7m.secure) {
+ DP_TBFLAG_M32(flags, SECURE, 1);
+ }
+
return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index ad617b9948..bf30231079 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9359,8 +9359,7 @@ static void arm_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
dc->vfp_enabled = 1;
dc->be_data = MO_TE;
dc->v7m_handler_mode = EX_TBFLAG_M32(tb_flags, HANDLER);
- dc->v8m_secure = arm_feature(env, ARM_FEATURE_M_SECURITY) &&
- regime_is_secure(env, dc->mmu_idx);
+ dc->v8m_secure = EX_TBFLAG_M32(tb_flags, SECURE);
dc->v8m_stackcheck = EX_TBFLAG_M32(tb_flags, STACKCHECK);
dc->v8m_fpccr_s_wrong = EX_TBFLAG_M32(tb_flags, FPCCR_S_WRONG);
dc->v7m_new_fp_ctxt_needed =
--
2.34.1
- [PATCH v2 08/66] target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8, (continued)
- [PATCH v2 08/66] target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8, Richard Henderson, 2022/08/22
- [PATCH v2 15/66] target/arm: Add secure parameter to get_phys_addr_pmsav8, Richard Henderson, 2022/08/22
- [PATCH v2 14/66] target/arm: Add is_secure parameter to get_phys_addr_v6, Richard Henderson, 2022/08/22
- [PATCH v2 18/66] target/arm: Add secure parameter to get_phys_addr_pmsav7, Richard Henderson, 2022/08/22
- [PATCH v2 16/66] target/arm: Add is_secure parameter to pmsav7_use_background_region, Richard Henderson, 2022/08/22
- [PATCH v2 19/66] target/arm: Add is_secure parameter to regime_translation_disabled, Richard Henderson, 2022/08/22
- [PATCH v2 20/66] target/arm: Add is_secure parameter to get_phys_addr_pmsav5, Richard Henderson, 2022/08/22
- [PATCH v2 21/66] target/arm: Split out get_phys_addr_with_secure, Richard Henderson, 2022/08/22
- [PATCH v2 22/66] target/arm: Add is_secure parameter to v7m_read_half_insn, Richard Henderson, 2022/08/22
- [PATCH v2 17/66] target/arm: Add is_secure parameter to get_phys_addr_lpae, Richard Henderson, 2022/08/22
- [PATCH v2 23/66] target/arm: Add TBFLAG_M32.SECURE,
Richard Henderson <=
- [PATCH v2 24/66] target/arm: Merge regime_is_secure into get_phys_addr, Richard Henderson, 2022/08/22
- [PATCH v2 27/66] target/arm: Reorg regime_translation_disabled, Richard Henderson, 2022/08/22
- [PATCH v2 28/66] target/arm: Drop secure check for HCR.TGE vs SCTLR_EL1.M, Richard Henderson, 2022/08/22
- [PATCH v2 26/66] target/arm: Fold secure and non-secure a-profile mmu indexes, Richard Henderson, 2022/08/22
- [PATCH v2 29/66] target/arm: Introduce arm_hcr_el2_eff_secstate, Richard Henderson, 2022/08/22
- [PATCH v2 30/66] target/arm: Hoist read of *is_secure in S1_ptw_translate, Richard Henderson, 2022/08/22
- [PATCH v2 25/66] target/arm: Add is_secure parameter to do_ats_write, Richard Henderson, 2022/08/22
- [PATCH v2 31/66] target/arm: Fix S2 disabled check in S1_ptw_translate, Richard Henderson, 2022/08/22
- [PATCH v2 32/66] target/arm: Remove env argument from combined_attrs_fwb, Richard Henderson, 2022/08/22
- [PATCH v2 33/66] target/arm: Pass HCR to attribute subroutines., Richard Henderson, 2022/08/22