[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL v2 64/91] target/tricore: Use setcondi instead of explicit allocat
From: |
Richard Henderson |
Subject: |
[PULL v2 64/91] target/tricore: Use setcondi instead of explicit allocation |
Date: |
Thu, 9 Mar 2023 12:05:23 -0800 |
This removes the only use of temp.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/tricore/translate.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index 19cf4b6cc7..6b2065803f 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -3514,17 +3514,14 @@ static void decode_sr_accu(DisasContext *ctx)
{
uint32_t op2;
uint32_t r1;
- TCGv temp;
r1 = MASK_OP_SR_S1D(ctx->opcode);
op2 = MASK_OP_SR_OP2(ctx->opcode);
switch (op2) {
case OPC2_16_SR_RSUB:
- /* overflow only if r1 = -0x80000000 */
- temp = tcg_const_i32(-0x80000000);
- /* calc V bit */
- tcg_gen_setcond_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r1], temp);
+ /* calc V bit -- overflow only if r1 = -0x80000000 */
+ tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r1],
-0x80000000);
tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31);
/* calc SV bit */
tcg_gen_or_tl(cpu_PSW_SV, cpu_PSW_SV, cpu_PSW_V);
--
2.34.1
- [PULL v2 56/91] target/rx: Avoid tcg_const_i32 when new temp needed, (continued)
- [PULL v2 56/91] target/rx: Avoid tcg_const_i32 when new temp needed, Richard Henderson, 2023/03/09
- [PULL v2 57/91] target/rx: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 58/91] target/s390x: Avoid tcg_const_i64, Richard Henderson, 2023/03/09
- [PULL v2 60/91] target/sh4: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 59/91] target/sh4: Avoid tcg_const_i32 for TAS.B, Richard Henderson, 2023/03/09
- [PULL v2 61/91] tcg/sparc: Avoid tcg_const_tl in gen_edge, Richard Henderson, 2023/03/09
- [PULL v2 62/91] target/tricore: Split t_n as constant from temp as variable, Richard Henderson, 2023/03/09
- [PULL v2 63/91] target/tricore: Rename t_off10 and use tcg_constant_i32, Richard Henderson, 2023/03/09
- [PULL v2 65/91] target/tricore: Drop some temp initialization, Richard Henderson, 2023/03/09
- [PULL v2 68/91] target/arm: Use rmode >= 0 for need_rmode, Richard Henderson, 2023/03/09
- [PULL v2 64/91] target/tricore: Use setcondi instead of explicit allocation,
Richard Henderson <=
- [PULL v2 67/91] tcg: Replace tcg_const_i64 in tcg-op.c, Richard Henderson, 2023/03/09
- [PULL v2 66/91] target/tricore: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 69/91] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 70/91] target/arm: Improve arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 74/91] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}, Richard Henderson, 2023/03/09
- [PULL v2 78/91] target/arm: Avoid tcg_const_ptr in handle_rev, Richard Henderson, 2023/03/09
- [PULL v2 71/91] target/arm: Consistently use ARMFPRounding during translation, Richard Henderson, 2023/03/09
- [PULL v2 72/91] target/arm: Create gen_set_rmode, gen_restore_rmode, Richard Henderson, 2023/03/09
- [PULL v2 79/91] target/m68k: Use tcg_constant_i32 in gen_ea_mode, Richard Henderson, 2023/03/09
- [PULL v2 77/91] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn, Richard Henderson, 2023/03/09