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[PULL v2 77/91] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshr
From: |
Richard Henderson |
Subject: |
[PULL v2 77/91] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn |
Date: |
Thu, 9 Mar 2023 12:05:36 -0800 |
It is easy enough to use mov instead of or-with-zero
and relying on the optimizer to fold away the or.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/translate-a64.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index 2ad7c48901..082a8b82dd 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -8459,7 +8459,7 @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool
is_scalar, bool is_q,
tcg_rn = tcg_temp_new_i64();
tcg_rd = tcg_temp_new_i64();
tcg_rd_narrowed = tcg_temp_new_i32();
- tcg_final = tcg_const_i64(0);
+ tcg_final = tcg_temp_new_i64();
if (round) {
tcg_round = tcg_constant_i64(1ULL << (shift - 1));
@@ -8473,7 +8473,11 @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool
is_scalar, bool is_q,
false, is_u_shift, size+1, shift);
narrowfn(tcg_rd_narrowed, cpu_env, tcg_rd);
tcg_gen_extu_i32_i64(tcg_rd, tcg_rd_narrowed);
- tcg_gen_deposit_i64(tcg_final, tcg_final, tcg_rd, esize * i, esize);
+ if (i == 0) {
+ tcg_gen_mov_i64(tcg_final, tcg_rd);
+ } else {
+ tcg_gen_deposit_i64(tcg_final, tcg_final, tcg_rd, esize * i,
esize);
+ }
}
if (!is_q) {
--
2.34.1
- [PULL v2 64/91] target/tricore: Use setcondi instead of explicit allocation, (continued)
- [PULL v2 64/91] target/tricore: Use setcondi instead of explicit allocation, Richard Henderson, 2023/03/09
- [PULL v2 67/91] tcg: Replace tcg_const_i64 in tcg-op.c, Richard Henderson, 2023/03/09
- [PULL v2 66/91] target/tricore: Avoid tcg_const_i32, Richard Henderson, 2023/03/09
- [PULL v2 69/91] target/arm: Handle FPROUNDING_ODD in arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 70/91] target/arm: Improve arm_rmode_to_sf, Richard Henderson, 2023/03/09
- [PULL v2 74/91] target/arm: Avoid tcg_const_ptr in gen_sve_{ldr,str}, Richard Henderson, 2023/03/09
- [PULL v2 78/91] target/arm: Avoid tcg_const_ptr in handle_rev, Richard Henderson, 2023/03/09
- [PULL v2 71/91] target/arm: Consistently use ARMFPRounding during translation, Richard Henderson, 2023/03/09
- [PULL v2 72/91] target/arm: Create gen_set_rmode, gen_restore_rmode, Richard Henderson, 2023/03/09
- [PULL v2 79/91] target/m68k: Use tcg_constant_i32 in gen_ea_mode, Richard Henderson, 2023/03/09
- [PULL v2 77/91] target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn,
Richard Henderson <=
- [PULL v2 75/91] target/arm: Avoid tcg_const_* in translate-mve.c, Richard Henderson, 2023/03/09
- [PULL v2 76/91] target/arm: Avoid tcg_const_ptr in disas_simd_zip_trn, Richard Henderson, 2023/03/09
- [PULL v2 73/91] target/arm: Improve trans_BFCI, Richard Henderson, 2023/03/09
- [PULL v2 85/91] target/ppc: Avoid tcg_const_* in power8-pmu-regs.c.inc, Richard Henderson, 2023/03/09
- [PULL v2 87/91] target/ppc: Fix gen_tlbsx_booke206, Richard Henderson, 2023/03/09
- [PULL v2 91/91] tcg: Drop tcg_const_*, Richard Henderson, 2023/03/09
- [PULL v2 90/91] tcg: Drop tcg_const_*_vec, Richard Henderson, 2023/03/09
- [PULL v2 89/91] target/tricore: Use min/max for saturate, Richard Henderson, 2023/03/09
- [PULL v2 88/91] target/ppc: Avoid tcg_const_* in translate.c, Richard Henderson, 2023/03/09
- [PULL v2 86/91] target/ppc: Rewrite trans_ADDG6S, Richard Henderson, 2023/03/09