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Re: [Qemu-riscv] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the X


From: Alistair Francis
Subject: Re: [Qemu-riscv] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
Date: Wed, 21 Nov 2018 13:54:25 -0800

On Wed, Nov 21, 2018 at 11:51 AM Alistair Francis <address@hidden> wrote:
>
> On Wed, Nov 21, 2018 at 11:25 AM Logan Gunthorpe <address@hidden> wrote:
> >
> >
> >
> > On 2018-11-21 12:21 p.m., Alistair Francis wrote:
> > > On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe <address@hidden> wrote:
> > >> Well, I also have a kernel (one I've built myself) without microsemi
> > >> support, but with Xilinx support and it also doesn't work (see my dmesg
> > >> logs I sent).
> > >
> > > So this one should work.
> >
> > It does not, see the dmesgs I sent a few emails ago.
> >
> > >>
> > >>> For people who have modified the standard bbl to edit the device tree
> > >>> before passing it to Linux to add the MicroSemi PCIe node, it won't
> > >>> work. That's a very small number of people who have modified the
> > >>> standard boot loader. I don't think we need to document how those
> > >>> people get back to the default set-up.
> > >>
> > >> I have not done that. And it's not working for me.
> > >
> > > If you haven't done this then how can Linux know to probe the
> > > MicroSemi PCIe root complex?
> >
> > Oh, well actually, in this case I was using the bbl/kernel you sent us,
> > so I'm not actually sure what's in it. The stuff I built myself doesn't
> > have any of the microsemi stuff, so it sounds like all that was a red
> > herring.
>
> Ah ok. There was some confusion there then.
>
> So now it sounds like it's not working and there is no MicroSemi
> device. I will check and see what I find.

Yep, I have no idea.

The last time I tested this it worked (although I might not have
tested interrupts) and now it doesn't. Nothing has changed in the
series, my guest software has changed though. I can see the root
complex, but no devices underneath it.

Sorry for the confusion with the MicroSemi PCIe root complex.

I think I'll just drop this patch. It doesn't work for 32-bit guests,
but I would like to model the hardware so I don't want to change the
addresses. We can revisit this in the future along with the gpex high
MMIO support and USB support.

Alistair

>
> Alistair
>
> >
> > Logan



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