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[PATCH v2 23/25] docs/system: Sort targets in alphabetical order
From: |
Bin Meng |
Subject: |
[PATCH v2 23/25] docs/system: Sort targets in alphabetical order |
Date: |
Sat, 23 Jan 2021 18:40:14 +0800 |
From: Bin Meng <bin.meng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
(no changes since v1)
docs/system/targets.rst | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/docs/system/targets.rst b/docs/system/targets.rst
index 560783644d..564cea9a9b 100644
--- a/docs/system/targets.rst
+++ b/docs/system/targets.rst
@@ -7,16 +7,21 @@ various targets are mentioned in the following sections.
Contents:
+..
+ This table of contents should be kept sorted alphabetically
+ by the title text of each file, which isn't the same ordering
+ as an alphabetical sort by filename.
+
.. toctree::
- target-i386
+ target-arm
+ target-avr
+ target-m68k
+ target-mips
target-ppc
+ target-rx
+ target-s390x
target-sparc
target-sparc64
- target-mips
- target-arm
- target-m68k
+ target-i386
target-xtensa
- target-s390x
- target-rx
- target-avr
--
2.25.1
- Re: [PATCH v2 18/25] hw/sd: ssi-sd: Bump up version ids of VMStateDescription, (continued)
- [PATCH v2 17/25] hw/sd: ssi-sd: Support multiple block write, Bin Meng, 2021/01/23
- [PATCH v2 11/25] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer, Bin Meng, 2021/01/23
- [PATCH v2 13/25] hw/sd: sd: Allow single/multiple block write for SPI mode, Bin Meng, 2021/01/23
- [PATCH v2 14/25] hw/sd: sd.h: Cosmetic change of using spaces, Bin Meng, 2021/01/23
- [PATCH v2 15/25] hw/sd: Introduce receive_ready() callback, Bin Meng, 2021/01/23
- [PATCH v2 16/25] hw/sd: ssi-sd: Support single block write, Bin Meng, 2021/01/23
- [PATCH v2 19/25] hw/ssi: Add SiFive SPI controller support, Bin Meng, 2021/01/23
- [PATCH v2 23/25] docs/system: Sort targets in alphabetical order,
Bin Meng <=
- [PATCH v2 25/25] docs/system: riscv: Add documentation for sifive_u machine, Bin Meng, 2021/01/23
- [PATCH v2 20/25] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash, Bin Meng, 2021/01/23
- [PATCH v2 22/25] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value, Bin Meng, 2021/01/23
- [PATCH v2 21/25] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card, Bin Meng, 2021/01/23
- [PATCH v2 24/25] docs/system: Add RISC-V documentation, Bin Meng, 2021/01/23
- Re: [PATCH v2 00/25] hw/riscv: sifive_u: Add missing SPI support, Philippe Mathieu-Daudé, 2021/01/24