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Re: [PATCH 04/15] hw/riscv: Sort machines Kconfig options in alphabetica
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From: |
Alistair Francis |
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Subject: |
Re: [PATCH 04/15] hw/riscv: Sort machines Kconfig options in alphabetical order |
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Date: |
Mon, 5 Dec 2022 08:24:24 +1000 |
On Fri, Dec 2, 2022 at 12:14 AM Bin Meng <bmeng@tinylab.org> wrote:
>
> SHAKTI_C machine Kconfig option was inserted in disorder. Fix it.
>
> Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> hw/riscv/Kconfig | 16 +++++++++-------
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig
> index 1e4b58024f..4550b3b938 100644
> --- a/hw/riscv/Kconfig
> +++ b/hw/riscv/Kconfig
> @@ -4,6 +4,8 @@ config RISCV_NUMA
> config IBEX
> bool
>
> +# RISC-V machines in alphabetical order
> +
> config MICROCHIP_PFSOC
> bool
> select CADENCE_SDHCI
> @@ -22,13 +24,6 @@ config OPENTITAN
> select SIFIVE_PLIC
> select UNIMP
>
> -config SHAKTI_C
> - bool
> - select UNIMP
> - select SHAKTI_UART
> - select RISCV_ACLINT
> - select SIFIVE_PLIC
> -
> config RISCV_VIRT
> bool
> imply PCI_DEVICES
> @@ -50,6 +45,13 @@ config RISCV_VIRT
> select FW_CFG_DMA
> select PLATFORM_BUS
>
> +config SHAKTI_C
> + bool
> + select RISCV_ACLINT
> + select SHAKTI_UART
> + select SIFIVE_PLIC
> + select UNIMP
> +
> config SIFIVE_E
> bool
> select RISCV_ACLINT
> --
> 2.34.1
>
>
- Re: [PATCH 03/15] hw/riscv: Fix opentitan dependency to SIFIVE_PLIC, (continued)
- [PATCH 06/15] hw/intc: sifive_plic: Drop PLICMode_H, Bin Meng, 2022/12/01
- [PATCH 05/15] hw/riscv: spike: Remove misleading comments, Bin Meng, 2022/12/01
- [PATCH 07/15] hw/intc: sifive_plic: Improve robustness of the PLIC config parser, Bin Meng, 2022/12/01
- [PATCH 04/15] hw/riscv: Sort machines Kconfig options in alphabetical order, Bin Meng, 2022/12/01
- Re: [PATCH 04/15] hw/riscv: Sort machines Kconfig options in alphabetical order,
Alistair Francis <=
- [PATCH 08/15] hw/intc: sifive_plic: Update "num-sources" property default value, Bin Meng, 2022/12/01
- [PATCH 09/15] hw/riscv: microchip_pfsoc: Fix the number of interrupt sources of PLIC, Bin Meng, 2022/12/01
- [PATCH 11/15] hw/riscv: sifive_u: Avoid using magic number for "riscv, ndev", Bin Meng, 2022/12/01
- [PATCH 10/15] hw/riscv: sifive_e: Fix the number of interrupt sources of PLIC, Bin Meng, 2022/12/01