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Re: [Discuss-gnuradio] Embedded control of USRP


From: Eric Blossom
Subject: Re: [Discuss-gnuradio] Embedded control of USRP
Date: Tue, 18 Apr 2006 19:25:39 -0700
User-agent: Mutt/1.5.9i

On Tue, Apr 18, 2006 at 06:18:55PM -0400, Lee Patton wrote:
> On Mon, 2006-04-03 at 11:20 -0700, Eric Blossom wrote:
> > ... unless you're a glutton for punishment, don't get the Celeron
> > version, spend the extra bucks and get the Pentium M.
> 
> Besides the dearth of on-board cache, what are the other drawbacks of a
> Celeron?
> 
> To fit the dimensional requirement I was given (5"x5"x~1"), the SBC must
> be passively cooled.  However, I'm not finding a Pentium-M solution that
> can be passively cooled and meets our availability requirements.  I have
> found a 600 MHz Celeron solution, but has half the L2 cache.
> 
> In our application, we'll be pulling full throttle from the USRP, maybe
> FIR filtering, and then pushing back out to USRP.  Not too heavy on the
> signal processing.
> 
> All advice appreciated.
> 
> - Lee
> 
> P.S.
> 
> Some potential solutions:
> http://www.gms4sbc.com/P60x_BO.html  (can't meet availability)
> http://www.kontron-emea.com/index.php?id=82&cat=58 (JRex-PM, can only
> air cool Celeron M 600 MHz)

You should be able to benchmark this, including cache performance
using oprofile.  To track cache misses you'll need to enable a
non-default set of counters in oprofile, but it's possible.
http:://oprofile.sf.net  You should be able to determine the cache
hit/miss ratio for you existing configuration using oprofile.

Benchmark the app you want to run on whatever you've currently got.
The closer in architecture/microarchitecture, the better.  Then scale
by CPU freq, and a big wild-ass guess on cache size differences.

Eric




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