[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 03/33] target/arm: Use object_property_add_bool for "sve" property
From: |
Peter Maydell |
Subject: |
[PULL 03/33] target/arm: Use object_property_add_bool for "sve" property |
Date: |
Tue, 19 Jan 2021 15:10:34 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
The interface for object_property_add_bool is simpler,
making the code easier to understand.
Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210111235740.462469-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/cpu64.c | 24 ++++++++++--------------
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index fa58211f7e6..dbd06ccc24c 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -488,6 +488,12 @@ static void cpu_max_set_sve_max_vq(Object *obj, Visitor
*v, const char *name,
cpu->sve_max_vq = max_vq;
}
+/*
+ * Note that cpu_arm_get/set_sve_vq cannot use the simpler
+ * object_property_add_bool interface because they make use
+ * of the contents of "name" to determine which bit on which
+ * to operate.
+ */
static void cpu_arm_get_sve_vq(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
@@ -529,26 +535,17 @@ static void cpu_arm_set_sve_vq(Object *obj, Visitor *v,
const char *name,
set_bit(vq - 1, cpu->sve_vq_init);
}
-static void cpu_arm_get_sve(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
+static bool cpu_arm_get_sve(Object *obj, Error **errp)
{
ARMCPU *cpu = ARM_CPU(obj);
- bool value = cpu_isar_feature(aa64_sve, cpu);
-
- visit_type_bool(v, name, &value, errp);
+ return cpu_isar_feature(aa64_sve, cpu);
}
-static void cpu_arm_set_sve(Object *obj, Visitor *v, const char *name,
- void *opaque, Error **errp)
+static void cpu_arm_set_sve(Object *obj, bool value, Error **errp)
{
ARMCPU *cpu = ARM_CPU(obj);
- bool value;
uint64_t t;
- if (!visit_type_bool(v, name, &value, errp)) {
- return;
- }
-
if (value && kvm_enabled() && !kvm_arm_sve_supported()) {
error_setg(errp, "'sve' feature not supported by KVM on this host");
return;
@@ -563,8 +560,7 @@ void aarch64_add_sve_properties(Object *obj)
{
uint32_t vq;
- object_property_add(obj, "sve", "bool", cpu_arm_get_sve,
- cpu_arm_set_sve, NULL, NULL);
+ object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve);
for (vq = 1; vq <= ARM_MAX_VQ; ++vq) {
char name[8];
--
2.20.1
- [PULL 00/33] target-arm queue, Peter Maydell, 2021/01/19
- [PULL 01/33] target/arm: Implement an IMPDEF pauth algorithm, Peter Maydell, 2021/01/19
- [PULL 03/33] target/arm: Use object_property_add_bool for "sve" property,
Peter Maydell <=
- [PULL 05/33] target/arm: add arm_is_el2_enabled() helper, Peter Maydell, 2021/01/19
- [PULL 02/33] target/arm: Add cpu properties to control pauth, Peter Maydell, 2021/01/19
- [PULL 07/33] target/arm: use arm_hcr_el2_eff() where applicable, Peter Maydell, 2021/01/19
- [PULL 09/33] target/arm: Define isar_feature function to test for presence of SEL2, Peter Maydell, 2021/01/19
- [PULL 06/33] target/arm: use arm_is_el2_enabled() where applicable, Peter Maydell, 2021/01/19
- [PULL 04/33] target/arm: remove redundant tests, Peter Maydell, 2021/01/19
- [PULL 11/33] target/arm: add MMU stage 1 for Secure EL2, Peter Maydell, 2021/01/19
- [PULL 08/33] target/arm: factor MDCR_EL2 common handling, Peter Maydell, 2021/01/19
- [PULL 13/33] target/arm: handle VMID change in secure state, Peter Maydell, 2021/01/19
- [PULL 10/33] target/arm: add 64-bit S-EL2 to EL exception table, Peter Maydell, 2021/01/19