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Re: [PULL 00/21] target-arm queue
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From: |
P J P |
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Subject: |
Re: [PULL 00/21] target-arm queue |
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Date: |
Wed, 3 Feb 2021 15:42:07 +0530 (IST) |
+-- On Wed, 3 Feb 2021, Philippe Mathieu-Daudé wrote --+
| FYI Prasad mentioned a CVE was requested:
| https://www.mail-archive.com/qemu-devel@nongnu.org/msg778659.html
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| As you said it is an odd configuration, I am not sure it is worth
| to wait for the CVE number to add it to the commit (which helps
| downstream distributions tracking these).
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| [updating]
|
| Just got detail from Prasad on IRC, it usually takes ~1 day to get
| the CVE number assigned, so maybe worth postponing this until tomorrow.
|
| Prasad, can you reply to this message ASAP once you get the number?
'CVE-2021-20221' assigned by Red Hat Inc.
-> https://bugs.launchpad.net/qemu/+bug/1914353/comments/3
Thank you.
--
Prasad J Pandit / Red Hat Product Security Team
8685 545E B54C 486B C6EB 271E E285 8B5A F050 DE8D
- [PULL 12/21] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, (continued)
- [PULL 12/21] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, Peter Maydell, 2021/02/02
- [PULL 17/21] hw/arm/exynos4210: Add missing dependency on OR_IRQ, Peter Maydell, 2021/02/02
- [PULL 18/21] hw/arm/xlnx-versal: Versal SoC requires ZDMA, Peter Maydell, 2021/02/02
- [PULL 20/21] hw/net/can: ZynqMP CAN device requires PTIMER, Peter Maydell, 2021/02/02
- [PULL 06/21] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset(), Peter Maydell, 2021/02/02
- [PULL 10/21] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled, Peter Maydell, 2021/02/02
- [PULL 14/21] hw/ssi: imx_spi: Correct tx and rx fifo endianness, Peter Maydell, 2021/02/02
- [PULL 21/21] hw/arm: Display CPU type in machine description, Peter Maydell, 2021/02/02
- [PULL 19/21] hw/arm/xlnx-versal: Versal SoC requires ZynqMP peripherals, Peter Maydell, 2021/02/02
- Re: [PULL 00/21] target-arm queue, Philippe Mathieu-Daudé, 2021/02/03
- Re: [PULL 00/21] target-arm queue,
P J P <=