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Re: [PATCH v2 4/9] escc: introduce escc_hard_reset_chn() for hardware re


From: Mark Cave-Ayland
Subject: Re: [PATCH v2 4/9] escc: introduce escc_hard_reset_chn() for hardware reset
Date: Thu, 2 Sep 2021 18:46:16 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0

On 02/09/2021 16:42, Peter Maydell wrote:

On Thu, 2 Sept 2021 at 11:33, Mark Cave-Ayland
<mark.cave-ayland@ilande.co.uk> wrote:

This new hardware reset function is to be called for both channels when the
hardware reset bit is written to register WR9. Its initial implementation is
the same as the existing escc_reset_chn() function used for device reset.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


The datasheet says the only differences between hard and soft
reset are for registers W9, W10, W11 and W14. I wasn't expecting
the functions to be completely separated out like this.

I did consider doing it that way, but felt having the 2 separate functions was the easiest to read against the tables in the datasheet. What do you think would be the best way to organise the reset functions?


ATB,

Mark.



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