Re: [PATCH v2 4/9] escc: introduce escc_hard_reset_chn() for hardware reset

[Mark Cave-Ayland]

On 02/09/2021 20:31, Peter Maydell wrote:

> On Thu, 2 Sept 2021 at 18:46, Mark Cave-Ayland
> <mark.cave-ayland@ilande.co.uk> wrote:
> > On 02/09/2021 16:42, Peter Maydell wrote:
> >
> > > On Thu, 2 Sept 2021 at 11:33, Mark Cave-Ayland
> > > <mark.cave-ayland@ilande.co.uk> wrote:
> > > > This new hardware reset function is to be called for both channels when the
> > > > hardware reset bit is written to register WR9. Its initial implementation is
> > > > the same as the existing escc_reset_chn() function used for device reset.
> > > >
> > > > Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
> > >
> > >
> > > The datasheet says the only differences between hard and soft
> > > reset are for registers W9, W10, W11 and W14. I wasn't expecting
> > > the functions to be completely separated out like this.
> >
> > I did consider doing it that way, but felt having the 2 separate functions was 
> > the
> > easiest to read against the tables in the datasheet. What do you think would be 
> > the
> > best way to organise the reset functions?
>
> I think having the hard-reset be "call the soft-reset and then
> clear/set the handful of bits that hard-reset touches and
> soft-reset doesn't" is probably clearer overall.

Okay thanks, I'll give that a go (probably tomorrow now...)


ATB,

Mark.