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[PULL 03/23] hw/char: cadence_uart: Move clock/reset check to uart_can_r
From: |
Peter Maydell |
Subject: |
[PULL 03/23] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() |
Date: |
Mon, 13 Sep 2021 17:11:24 +0100 |
From: Bin Meng <bmeng.cn@gmail.com>
Currently the clock/reset check is done in uart_receive(), but we
can move the check to uart_can_receive() which is earlier.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210901124521.30599-4-bmeng.cn@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/char/cadence_uart.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 154be34992b..fff8be36191 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -235,8 +235,16 @@ static void uart_parameters_setup(CadenceUARTState *s)
static int uart_can_receive(void *opaque)
{
CadenceUARTState *s = opaque;
- int ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
- uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
+ int ret;
+ uint32_t ch_mode;
+
+ /* ignore characters when unclocked or in reset */
+ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
+ return 0;
+ }
+
+ ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
+ ch_mode = s->r[R_MR] & UART_MR_CHMODE;
if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
ret = MIN(ret, CADENCE_UART_RX_FIFO_SIZE - s->rx_count);
@@ -358,11 +366,6 @@ static void uart_receive(void *opaque, const uint8_t *buf,
int size)
CadenceUARTState *s = opaque;
uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
- /* ignore characters when unclocked or in reset */
- if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
- return;
- }
-
if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
uart_write_rx_fifo(opaque, buf, size);
}
--
2.20.1
- [PULL 00/23] target-arm queue, Peter Maydell, 2021/09/13
- [PULL 01/23] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase, Peter Maydell, 2021/09/13
- [PULL 02/23] hw/char: cadence_uart: Disable transmit when input clock is disabled, Peter Maydell, 2021/09/13
- [PULL 03/23] hw/char: cadence_uart: Move clock/reset check to uart_can_receive(),
Peter Maydell <=
- [PULL 04/23] hw/char: cadence_uart: Convert to memop_with_attrs() ops, Peter Maydell, 2021/09/13
- [PULL 05/23] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}(), Peter Maydell, 2021/09/13
- [PULL 06/23] hw/char: cadence_uart: Log a guest error when device is unclocked or in reset, Peter Maydell, 2021/09/13
- [PULL 07/23] hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM, Peter Maydell, 2021/09/13
- [PULL 08/23] hw/arm: Add support for kudo-bmc board., Peter Maydell, 2021/09/13
- [PULL 09/23] hw/intc: GICv3 ITS initial framework, Peter Maydell, 2021/09/13
- [PULL 11/23] hw/intc: GICv3 ITS command queue framework, Peter Maydell, 2021/09/13
- [PULL 10/23] hw/intc: GICv3 ITS register definitions added, Peter Maydell, 2021/09/13
- [PULL 15/23] tests/data/acpi/virt: Add IORT files for ITS, Peter Maydell, 2021/09/13
- [PULL 13/23] hw/intc: GICv3 ITS Feature enablement, Peter Maydell, 2021/09/13