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[PATCH 06/10] includes: move irq definitions out of cpu-all.h
From: |
Alex Bennée |
Subject: |
[PATCH 06/10] includes: move irq definitions out of cpu-all.h |
Date: |
Mon, 20 Mar 2023 10:10:31 +0000 |
These are common across all versions of the system so it would help if
we could use them for common code.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
include/exec/cpu-all.h | 52 +-------------------------
include/exec/cpu-irq.h | 83 ++++++++++++++++++++++++++++++++++++++++++
include/exec/poison.h | 13 -------
3 files changed, 84 insertions(+), 64 deletions(-)
create mode 100644 include/exec/cpu-irq.h
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 2eb1176538..6b8085cf19 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -297,57 +297,7 @@ void *page_get_target_data(target_ulong address)
CPUArchState *cpu_copy(CPUArchState *env);
-/* Flags for use in ENV->INTERRUPT_PENDING.
-
- The numbers assigned here are non-sequential in order to preserve
- binary compatibility with the vmstate dump. Bit 0 (0x0001) was
- previously used for CPU_INTERRUPT_EXIT, and is cleared when loading
- the vmstate dump. */
-
-/* External hardware interrupt pending. This is typically used for
- interrupts from devices. */
-#define CPU_INTERRUPT_HARD 0x0002
-
-/* Exit the current TB. This is typically used when some system-level device
- makes some change to the memory mapping. E.g. the a20 line change. */
-#define CPU_INTERRUPT_EXITTB 0x0004
-
-/* Halt the CPU. */
-#define CPU_INTERRUPT_HALT 0x0020
-
-/* Debug event pending. */
-#define CPU_INTERRUPT_DEBUG 0x0080
-
-/* Reset signal. */
-#define CPU_INTERRUPT_RESET 0x0400
-
-/* Several target-specific external hardware interrupts. Each target/cpu.h
- should define proper names based on these defines. */
-#define CPU_INTERRUPT_TGT_EXT_0 0x0008
-#define CPU_INTERRUPT_TGT_EXT_1 0x0010
-#define CPU_INTERRUPT_TGT_EXT_2 0x0040
-#define CPU_INTERRUPT_TGT_EXT_3 0x0200
-#define CPU_INTERRUPT_TGT_EXT_4 0x1000
-
-/* Several target-specific internal interrupts. These differ from the
- preceding target-specific interrupts in that they are intended to
- originate from within the cpu itself, typically in response to some
- instruction being executed. These, therefore, are not masked while
- single-stepping within the debugger. */
-#define CPU_INTERRUPT_TGT_INT_0 0x0100
-#define CPU_INTERRUPT_TGT_INT_1 0x0800
-#define CPU_INTERRUPT_TGT_INT_2 0x2000
-
-/* First unused bit: 0x4000. */
-
-/* The set of all bits that should be masked when single-stepping. */
-#define CPU_INTERRUPT_SSTEP_MASK \
- (CPU_INTERRUPT_HARD \
- | CPU_INTERRUPT_TGT_EXT_0 \
- | CPU_INTERRUPT_TGT_EXT_1 \
- | CPU_INTERRUPT_TGT_EXT_2 \
- | CPU_INTERRUPT_TGT_EXT_3 \
- | CPU_INTERRUPT_TGT_EXT_4)
+#include "exec/cpu-irq.h"
#ifdef CONFIG_USER_ONLY
diff --git a/include/exec/cpu-irq.h b/include/exec/cpu-irq.h
new file mode 100644
index 0000000000..58bd98d812
--- /dev/null
+++ b/include/exec/cpu-irq.h
@@ -0,0 +1,83 @@
+/*
+ * Internal execution defines for qemu irqs
+ *
+ * Copyright (c) 2003 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef EXEC_CPU_IRQ_H
+#define EXEC_CPU_IRQ_H
+
+/*
+ * Flags for use in ENV->INTERRUPT_PENDING.
+ *
+ * The numbers assigned here are non-sequential in order to preserve
+ * binary compatibility with the vmstate dump. Bit 0 (0x0001) was
+ * previously used for CPU_INTERRUPT_EXIT, and is cleared when loading
+ * the vmstate dump.
+ */
+
+/*
+ * External hardware interrupt pending. This is typically used for
+ * interrupts from devices.
+ */
+#define CPU_INTERRUPT_HARD 0x0002
+
+/*
+ * Exit the current TB. This is typically used when some system-level device
+ * makes some change to the memory mapping. E.g. the a20 line change.
+ */
+#define CPU_INTERRUPT_EXITTB 0x0004
+
+/* Halt the CPU. */
+#define CPU_INTERRUPT_HALT 0x0020
+
+/* Debug event pending. */
+#define CPU_INTERRUPT_DEBUG 0x0080
+
+/* Reset signal. */
+#define CPU_INTERRUPT_RESET 0x0400
+
+/* Several target-specific external hardware interrupts. Each target/cpu.h
+ should define proper names based on these defines. */
+#define CPU_INTERRUPT_TGT_EXT_0 0x0008
+#define CPU_INTERRUPT_TGT_EXT_1 0x0010
+#define CPU_INTERRUPT_TGT_EXT_2 0x0040
+#define CPU_INTERRUPT_TGT_EXT_3 0x0200
+#define CPU_INTERRUPT_TGT_EXT_4 0x1000
+
+/*
+ * Several target-specific internal interrupts. These differ from the
+ * preceding target-specific interrupts in that they are intended to
+ * originate from within the cpu itself, typically in response to some
+ * instruction being executed. These, therefore, are not masked while
+ * single-stepping within the debugger.
+ */
+#define CPU_INTERRUPT_TGT_INT_0 0x0100
+#define CPU_INTERRUPT_TGT_INT_1 0x0800
+#define CPU_INTERRUPT_TGT_INT_2 0x2000
+
+/* First unused bit: 0x4000. */
+
+/* The set of all bits that should be masked when single-stepping. */
+#define CPU_INTERRUPT_SSTEP_MASK \
+ (CPU_INTERRUPT_HARD \
+ | CPU_INTERRUPT_TGT_EXT_0 \
+ | CPU_INTERRUPT_TGT_EXT_1 \
+ | CPU_INTERRUPT_TGT_EXT_2 \
+ | CPU_INTERRUPT_TGT_EXT_3 \
+ | CPU_INTERRUPT_TGT_EXT_4)
+
+#endif /* EXEC_CPU_IRQ_H */
diff --git a/include/exec/poison.h b/include/exec/poison.h
index 140daa4a85..a0ab1d7d46 100644
--- a/include/exec/poison.h
+++ b/include/exec/poison.h
@@ -52,19 +52,6 @@
#pragma GCC poison TARGET_PAGE_BITS
#pragma GCC poison TARGET_PAGE_ALIGN
-#pragma GCC poison CPU_INTERRUPT_HARD
-#pragma GCC poison CPU_INTERRUPT_EXITTB
-#pragma GCC poison CPU_INTERRUPT_HALT
-#pragma GCC poison CPU_INTERRUPT_DEBUG
-#pragma GCC poison CPU_INTERRUPT_TGT_EXT_0
-#pragma GCC poison CPU_INTERRUPT_TGT_EXT_1
-#pragma GCC poison CPU_INTERRUPT_TGT_EXT_2
-#pragma GCC poison CPU_INTERRUPT_TGT_EXT_3
-#pragma GCC poison CPU_INTERRUPT_TGT_EXT_4
-#pragma GCC poison CPU_INTERRUPT_TGT_INT_0
-#pragma GCC poison CPU_INTERRUPT_TGT_INT_1
-#pragma GCC poison CPU_INTERRUPT_TGT_INT_2
-
#pragma GCC poison CONFIG_ALPHA_DIS
#pragma GCC poison CONFIG_CRIS_DIS
#pragma GCC poison CONFIG_HPPA_DIS
--
2.39.2
- Re: [PATCH 03/10] accel/tcg: move i386 halt handling to sysemu_ops, (continued)
[PATCH 10/10] accel/tcg: remove unused includes, Alex Bennée, 2023/03/20
[PATCH 04/10] accel/tcg: don't bother with ifdef for CPU_DUMP_CCOP, Alex Bennée, 2023/03/20
[PATCH 06/10] includes: move irq definitions out of cpu-all.h,
Alex Bennée <=
[PATCH 09/10] accel/tcg: re-inline the filtering of virtual IRQs but data driven, Alex Bennée, 2023/03/20
[PATCH 01/10] metadata: add .git-blame-ignore-revs, Alex Bennée, 2023/03/20
[PATCH 02/10] accel/tcg: move cpu_reloading_memory_map into cpu-exec-softmmu, Alex Bennée, 2023/03/20