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Re: [uracoli-devel] Question regarding LQI and ED values [Update]


From: Joerg Wunsch
Subject: Re: [uracoli-devel] Question regarding LQI and ED values [Update]
Date: Tue, 28 Aug 2012 16:32:46 +0200
User-agent: Mutt/1.5.20 (2009-06-14)

As Eric Jennings wrote:

> The datasheet says that the max ED value is 0x53, so with the boards
> right next to each other, I'm only getting around -48dBm, or half of
> the ED value that's theoretically possible?  Meh, maybe these
> Sparkfun boards aren't as great as I first thought.

Well, how to put it politely? ;-)

I'd say Sparkfun has seasoned digital PCB designers.  The traces from
the digital IO pins nicely fan out to their respective IO pin headers,
in an aesthetically pleasant way.

However, once they finished their digital design, they must have
noticed there were still two pins left to be routed, RFN and RFP. :)
So they apparently routed these two traces wherever some space was
still available ...

The only bad thing with that: these two pins are toggling 2.5 billion
times per second, while the digital IO pins are essentially at DC
level (compared to the UHF pins).  The UHF traces are neither
impendance controlled nor even kept quite short, one of them crosses
layers here and there, the other one doesn't.  The balun is correctly
connected from a netlist's point of view, but the one who designed the
PCB apparently never even had a short glimpse into the balun's
datasheet and the layout recommendations mentioned there.  The balun's
ground connection is something like a choke of several nanohenrys,
featuring an impedance of maybe 100 Ω at the operating frequency.
(The rule of thumb is that 1 mm of PCB trace contributes approximately
1 nH of inductance.)  In other words: the balun doesn't have an
RF-capable ground connection at all.  It appears merely incidentical
that some of the GND pour caught one of the balun's ground pins, but
not even an attempt to put two simple vias to connect it to the ground
plane on the other side has been made.  (The layout recommendation
mentions *four* vias close to the GND pin.)

Whoever designed that PCB appears to have never done any UHF design
before.

To quote a colleague: "I'm sure they didn't have problems passing FCC.
On a board that doesn't radiate *anything*, maintaining the FCC
requirements for spurious emissions is simple." ;-)

Oh, and don't forget to tie the TST pin to GND, they accidentally left
it floating ...  (The pin is only required for parallel programming.
In all other cases, it ought to be connected to GND.)
-- 
cheers, J"org               .-.-.   --... ...--   -.. .  DL8DTL

http://www.sax.de/~joerg/                        NIC: JW11-RIPE
Never trust an operating system you don't have sources for. ;-)



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