Static pattern usage

[Sam Ravnborg]

I'm having troubles using static patters.
See following example:
------------------------------------
deps_foo.o := foo.h

foo.o : % : $(deps_%) bar.h FORCE
        @echo $^

FORCE:
------------------------------------

When executed I expected it to print:
foo.h bar.h FORCE

But it only prints bar.h FORCE

Is it coorect behaviour that make does not expand the variable
$(deps_foo.o)?
% is equal to foo.o in the above example, and the varibale is
constructed correct. But it is not expanded.

GNU Make 3.80
Copyright (C) 2002  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

        Sam