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Re: [Discuss-gnuradio] Re: interfacing a DSP array card to USRP2


From: Matt Ettus
Subject: Re: [Discuss-gnuradio] Re: interfacing a DSP array card to USRP2
Date: Tue, 13 Apr 2010 16:44:42 -0700
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On 04/12/2010 05:22 PM, Vikram Ragukumar wrote:
Matt,

In our effort to distill the gemac core and related logic, we have
pulled out the following module under u2_core
SERDES, Dsp core, UART, external RAM interface and the buffer pool

The mac is all contained in simple_gemac, and above that in
simple_gemac_wrapper:
which is instantiated in u2_core. Most of the buffering happens in
simple_gemac_wrapper in the fifo_2clock_cascade files.

(a) Is any buffering for the gemac done using buffers in the buffer pool
or is it ok to eliminate that module all together ?

Yes, it does buffering. You can get rid of it, but then you'll need to create a module which holds the FIFO contents until there is a complete packet. Otherwise, the ethernet will start sending the packet before you have a complete packet there.

(b) The synthesis report currently shows that 24 BRAM's are being used
by the design. Does this sound about right ? Are there modules unrelated
to gemac or aeMB that we can pull out, to reduce BRAM usage ?


You're going to need to do your own exploration. ISE has a feature to tell you which modules are using block rams.

Matt




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