[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 16/21] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ
From: |
Peter Maydell |
Subject: |
[PULL 16/21] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ |
Date: |
Tue, 2 Feb 2021 17:55:12 +0000 |
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
The STM32F405 SoC uses an OR gate on its ADC IRQs.
Fixes: 529fc5fd3e1 ("hw/arm: Add the STM32F4xx SoC")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210131184449.382425-2-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 13cc42dcc84..a320a124855 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -336,6 +336,7 @@ config STM32F205_SOC
config STM32F405_SOC
bool
select ARM_V7M
+ select OR_IRQ
select STM32F4XX_SYSCFG
select STM32F4XX_EXTI
--
2.20.1
- [PULL 03/21] hw/char/exynos4210_uart: Fix missing call to report ready for input, (continued)
- [PULL 03/21] hw/char/exynos4210_uart: Fix missing call to report ready for input, Peter Maydell, 2021/02/02
- [PULL 02/21] hw/char/exynos4210_uart: Fix buffer size reporting with FIFO disabled, Peter Maydell, 2021/02/02
- [PULL 05/21] hw/ssi: imx_spi: Use a macro for number of chip selects supported, Peter Maydell, 2021/02/02
- [PULL 11/21] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Peter Maydell, 2021/02/02
- [PULL 08/21] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/02/02
- [PULL 07/21] hw/ssi: imx_spi: Remove pointless variable initialization, Peter Maydell, 2021/02/02
- [PULL 01/21] hw/intc/arm_gic: Allow to use QTest without crashing, Peter Maydell, 2021/02/02
- [PULL 04/21] hw/arm/smmuv3: Fix addr_mask for range-based invalidation, Peter Maydell, 2021/02/02
- [PULL 09/21] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled, Peter Maydell, 2021/02/02
- [PULL 13/21] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic, Peter Maydell, 2021/02/02
- [PULL 16/21] hw/arm/stm32f405_soc: Add missing dependency on OR_IRQ,
Peter Maydell <=
- [PULL 15/21] hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register, Peter Maydell, 2021/02/02
- [PULL 12/21] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, Peter Maydell, 2021/02/02
- [PULL 17/21] hw/arm/exynos4210: Add missing dependency on OR_IRQ, Peter Maydell, 2021/02/02
- [PULL 18/21] hw/arm/xlnx-versal: Versal SoC requires ZDMA, Peter Maydell, 2021/02/02
- [PULL 20/21] hw/net/can: ZynqMP CAN device requires PTIMER, Peter Maydell, 2021/02/02
- [PULL 06/21] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset(), Peter Maydell, 2021/02/02
- [PULL 10/21] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled, Peter Maydell, 2021/02/02
- [PULL 14/21] hw/ssi: imx_spi: Correct tx and rx fifo endianness, Peter Maydell, 2021/02/02
- [PULL 21/21] hw/arm: Display CPU type in machine description, Peter Maydell, 2021/02/02
- [PULL 19/21] hw/arm/xlnx-versal: Versal SoC requires ZynqMP peripherals, Peter Maydell, 2021/02/02