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[PULL 09/60] target/ppc: Fix icount access for some hypervisor instructi
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 09/60] target/ppc: Fix icount access for some hypervisor instructions |
Date: |
Fri, 7 Jul 2023 08:30:17 -0300 |
From: Nicholas Piggin <npiggin@gmail.com>
Several instructions and register access require icount reads and are
missing translator_io_start().
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20230625103700.8992-1-npiggin@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/translate.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 599bd4b4f9..4766240927 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1187,6 +1187,7 @@ void spr_write_tfmr(DisasContext *ctx, int sprn, int gprn)
void spr_write_lpcr(DisasContext *ctx, int sprn, int gprn)
{
+ translator_io_start(&ctx->base);
gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]);
}
#endif /* !defined(CONFIG_USER_ONLY) */
@@ -4012,6 +4013,7 @@ static void gen_doze(DisasContext *ctx)
TCGv_i32 t;
CHK_HV(ctx);
+ translator_io_start(&ctx->base);
t = tcg_constant_i32(PPC_PM_DOZE);
gen_helper_pminsn(cpu_env, t);
/* Stop translation, as the CPU is supposed to sleep from now */
@@ -4027,6 +4029,7 @@ static void gen_nap(DisasContext *ctx)
TCGv_i32 t;
CHK_HV(ctx);
+ translator_io_start(&ctx->base);
t = tcg_constant_i32(PPC_PM_NAP);
gen_helper_pminsn(cpu_env, t);
/* Stop translation, as the CPU is supposed to sleep from now */
@@ -4042,6 +4045,7 @@ static void gen_stop(DisasContext *ctx)
TCGv_i32 t;
CHK_HV(ctx);
+ translator_io_start(&ctx->base);
t = tcg_constant_i32(PPC_PM_STOP);
gen_helper_pminsn(cpu_env, t);
/* Stop translation, as the CPU is supposed to sleep from now */
@@ -4057,6 +4061,7 @@ static void gen_sleep(DisasContext *ctx)
TCGv_i32 t;
CHK_HV(ctx);
+ translator_io_start(&ctx->base);
t = tcg_constant_i32(PPC_PM_SLEEP);
gen_helper_pminsn(cpu_env, t);
/* Stop translation, as the CPU is supposed to sleep from now */
@@ -4072,6 +4077,7 @@ static void gen_rvwinkle(DisasContext *ctx)
TCGv_i32 t;
CHK_HV(ctx);
+ translator_io_start(&ctx->base);
t = tcg_constant_i32(PPC_PM_RVWINKLE);
gen_helper_pminsn(cpu_env, t);
/* Stop translation, as the CPU is supposed to sleep from now */
@@ -4468,6 +4474,7 @@ static void gen_hrfid(DisasContext *ctx)
#else
/* Restore CPU state */
CHK_HV(ctx);
+ translator_io_start(&ctx->base);
gen_helper_hrfid(cpu_env);
ctx->base.is_jmp = DISAS_EXIT;
#endif
--
2.41.0
- [PULL 00/60] ppc queue, Daniel Henrique Barboza, 2023/07/07
- [PULL 02/60] target/ppc: Make HDECR underflow edge triggered, Daniel Henrique Barboza, 2023/07/07
- [PULL 01/60] pnv/psi: Allow access to PSI registers through xscom, Daniel Henrique Barboza, 2023/07/07
- [PULL 03/60] hw/ppc: Fix clock update drift, Daniel Henrique Barboza, 2023/07/07
- [PULL 06/60] target/ppc: Tidy POWER book4 SPR registration, Daniel Henrique Barboza, 2023/07/07
- [PULL 05/60] mv64361: Add dummy gigabit ethernet PHY access registers, Daniel Henrique Barboza, 2023/07/07
- [PULL 04/60] target/ppc: Only generate decodetree files when TCG is enabled, Daniel Henrique Barboza, 2023/07/07
- [PULL 07/60] target/ppc: Add TFMR SPR implementation with read and write helpers, Daniel Henrique Barboza, 2023/07/07
- [PULL 08/60] sungem: Add WOL MMIO, Daniel Henrique Barboza, 2023/07/07
- [PULL 09/60] target/ppc: Fix icount access for some hypervisor instructions,
Daniel Henrique Barboza <=
- [PULL 10/60] tests/avocado: record_replay test for ppc powernv machine, Daniel Henrique Barboza, 2023/07/07
- [PULL 11/60] pnv/xive2: Allow indirect TIMA accesses of all sizes, Daniel Henrique Barboza, 2023/07/07
- [PULL 12/60] target/ppc: Remove some superfluous parentheses, Daniel Henrique Barboza, 2023/07/07
- [PULL 13/60] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup(), Daniel Henrique Barboza, 2023/07/07
- [PULL 14/60] target/ppc: Move common check in exception handlers to a function, Daniel Henrique Barboza, 2023/07/07
- [PULL 15/60] target/ppc: Remove some more local CPUState variables only used once, Daniel Henrique Barboza, 2023/07/07
- [PULL 16/60] target/ppd: Remove unused define, Daniel Henrique Barboza, 2023/07/07
- [PULL 17/60] target/ppc: Get CPUState in one step, Daniel Henrique Barboza, 2023/07/07
- [PULL 18/60] target: ppc: Use MSR_HVB bit to get the target endianness for memory dump, Daniel Henrique Barboza, 2023/07/07
- [PULL 19/60] pnv/xive2: Fix TIMA offset for indirect access, Daniel Henrique Barboza, 2023/07/07