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[PULL 15/60] target/ppc: Remove some more local CPUState variables only
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 15/60] target/ppc: Remove some more local CPUState variables only used once |
Date: |
Fri, 7 Jul 2023 08:30:23 -0300 |
From: BALATON Zoltan <balaton@eik.bme.hu>
Some helpers only have a CPUState local to call cpu_interrupt_exittb()
but we can use env_cpu for that and remove the local.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Acked-by: Nicholas Piggin <npiggin@gmail.com>
Message-ID:
<aa34e449552c6ab52d48938ccbe762fc06adac01.1686868895.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/excp_helper.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index d1d3d089a6..b2cff4e7eb 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -2653,8 +2653,7 @@ void helper_store_msr(CPUPPCState *env, target_ulong val)
uint32_t excp = hreg_store_msr(env, val, 0);
if (excp != 0) {
- CPUState *cs = env_cpu(env);
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env_cpu(env));
raise_exception(env, excp);
}
}
@@ -2691,8 +2690,6 @@ void helper_pminsn(CPUPPCState *env, uint32_t insn)
static void do_rfi(CPUPPCState *env, target_ulong nip, target_ulong msr)
{
- CPUState *cs = env_cpu(env);
-
/* MSR:POW cannot be set by any form of rfi */
msr &= ~(1ULL << MSR_POW);
@@ -2716,7 +2713,7 @@ static void do_rfi(CPUPPCState *env, target_ulong nip,
target_ulong msr)
* No need to raise an exception here, as rfi is always the last
* insn of a TB
*/
- cpu_interrupt_exittb(cs);
+ cpu_interrupt_exittb(env_cpu(env));
/* Reset the reservation */
env->reserve_addr = -1;
--
2.41.0
- [PULL 05/60] mv64361: Add dummy gigabit ethernet PHY access registers, (continued)
- [PULL 05/60] mv64361: Add dummy gigabit ethernet PHY access registers, Daniel Henrique Barboza, 2023/07/07
- [PULL 04/60] target/ppc: Only generate decodetree files when TCG is enabled, Daniel Henrique Barboza, 2023/07/07
- [PULL 07/60] target/ppc: Add TFMR SPR implementation with read and write helpers, Daniel Henrique Barboza, 2023/07/07
- [PULL 08/60] sungem: Add WOL MMIO, Daniel Henrique Barboza, 2023/07/07
- [PULL 09/60] target/ppc: Fix icount access for some hypervisor instructions, Daniel Henrique Barboza, 2023/07/07
- [PULL 10/60] tests/avocado: record_replay test for ppc powernv machine, Daniel Henrique Barboza, 2023/07/07
- [PULL 11/60] pnv/xive2: Allow indirect TIMA accesses of all sizes, Daniel Henrique Barboza, 2023/07/07
- [PULL 12/60] target/ppc: Remove some superfluous parentheses, Daniel Henrique Barboza, 2023/07/07
- [PULL 13/60] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup(), Daniel Henrique Barboza, 2023/07/07
- [PULL 14/60] target/ppc: Move common check in exception handlers to a function, Daniel Henrique Barboza, 2023/07/07
- [PULL 15/60] target/ppc: Remove some more local CPUState variables only used once,
Daniel Henrique Barboza <=
- [PULL 16/60] target/ppd: Remove unused define, Daniel Henrique Barboza, 2023/07/07
- [PULL 17/60] target/ppc: Get CPUState in one step, Daniel Henrique Barboza, 2023/07/07
- [PULL 18/60] target: ppc: Use MSR_HVB bit to get the target endianness for memory dump, Daniel Henrique Barboza, 2023/07/07
- [PULL 19/60] pnv/xive2: Fix TIMA offset for indirect access, Daniel Henrique Barboza, 2023/07/07
- [PULL 20/60] pnv/xive: Add property on xive sources to define PQ state on reset, Daniel Henrique Barboza, 2023/07/07
- [PULL 21/60] pnv/psi: Initialize the PSIHB interrupts to match hardware, Daniel Henrique Barboza, 2023/07/07
- [PULL 22/60] ppc/pnv: quad xscom callbacks are P9 specific, Daniel Henrique Barboza, 2023/07/07
- [PULL 23/60] ppc/pnv: Subclass quad xscom callbacks, Daniel Henrique Barboza, 2023/07/07
- [PULL 24/60] ppc/pnv: Add P10 quad xscom model, Daniel Henrique Barboza, 2023/07/07
- [PULL 25/60] ppc/pnv: Add P10 core xscom model, Daniel Henrique Barboza, 2023/07/07