[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 14/60] target/ppc: Move common check in exception handlers to a fu
From: |
Daniel Henrique Barboza |
Subject: |
[PULL 14/60] target/ppc: Move common check in exception handlers to a function |
Date: |
Fri, 7 Jul 2023 08:30:22 -0300 |
From: BALATON Zoltan <balaton@eik.bme.hu>
All powerpc exception handlers share some code when handling machine
check exceptions. Move this to a common function.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Message-ID:
<9cfffaa35aa894086dd092af6b0b26f2d62ff3de.1686868895.git.balaton@eik.bme.hu>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
---
target/ppc/excp_helper.c | 114 +++++++++------------------------------
1 file changed, 25 insertions(+), 89 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 3ddec06f65..d1d3d089a6 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -424,6 +424,25 @@ static void powerpc_set_excp_state(PowerPCCPU *cpu,
target_ulong vector,
env->reserve_addr = -1;
}
+static void powerpc_mcheck_checkstop(CPUPPCState *env)
+{
+ CPUState *cs = env_cpu(env);
+
+ if (FIELD_EX64(env->msr, MSR, ME)) {
+ return;
+ }
+
+ /* Machine check exception is not enabled. Enter checkstop state. */
+ fprintf(stderr, "Machine check while not allowed. "
+ "Entering checkstop state\n");
+ if (qemu_log_separate()) {
+ qemu_log("Machine check while not allowed. "
+ "Entering checkstop state\n");
+ }
+ cs->halted = 1;
+ cpu_interrupt_exittb(cs);
+}
+
static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
{
CPUState *cs = CPU(cpu);
@@ -466,21 +485,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
srr1 = SPR_40x_SRR3;
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -597,21 +602,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_CRITICAL: /* Critical input */
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -770,21 +761,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -955,21 +932,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -1150,21 +1113,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
srr1 = SPR_BOOKE_CSRR1;
break;
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
-
+ powerpc_mcheck_checkstop(env);
/* machine check exceptions don't have ME set */
new_msr &= ~((target_ulong)1 << MSR_ME);
@@ -1467,20 +1416,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK: /* Machine check exception */
- if (!FIELD_EX64(env->msr, MSR, ME)) {
- /*
- * Machine check exception is not enabled. Enter
- * checkstop state.
- */
- fprintf(stderr, "Machine check while not allowed. "
- "Entering checkstop state\n");
- if (qemu_log_separate()) {
- qemu_log("Machine check while not allowed. "
- "Entering checkstop state\n");
- }
- cs->halted = 1;
- cpu_interrupt_exittb(cs);
- }
+ powerpc_mcheck_checkstop(env);
if (env->msr_mask & MSR_HVB) {
/*
* ISA specifies HV, but can be delivered to guest with HV
--
2.41.0
- [PULL 06/60] target/ppc: Tidy POWER book4 SPR registration, (continued)
- [PULL 06/60] target/ppc: Tidy POWER book4 SPR registration, Daniel Henrique Barboza, 2023/07/07
- [PULL 05/60] mv64361: Add dummy gigabit ethernet PHY access registers, Daniel Henrique Barboza, 2023/07/07
- [PULL 04/60] target/ppc: Only generate decodetree files when TCG is enabled, Daniel Henrique Barboza, 2023/07/07
- [PULL 07/60] target/ppc: Add TFMR SPR implementation with read and write helpers, Daniel Henrique Barboza, 2023/07/07
- [PULL 08/60] sungem: Add WOL MMIO, Daniel Henrique Barboza, 2023/07/07
- [PULL 09/60] target/ppc: Fix icount access for some hypervisor instructions, Daniel Henrique Barboza, 2023/07/07
- [PULL 10/60] tests/avocado: record_replay test for ppc powernv machine, Daniel Henrique Barboza, 2023/07/07
- [PULL 11/60] pnv/xive2: Allow indirect TIMA accesses of all sizes, Daniel Henrique Barboza, 2023/07/07
- [PULL 12/60] target/ppc: Remove some superfluous parentheses, Daniel Henrique Barboza, 2023/07/07
- [PULL 13/60] target/ppc: Remove unneeded parameter from powerpc_reset_wakeup(), Daniel Henrique Barboza, 2023/07/07
- [PULL 14/60] target/ppc: Move common check in exception handlers to a function,
Daniel Henrique Barboza <=
- [PULL 15/60] target/ppc: Remove some more local CPUState variables only used once, Daniel Henrique Barboza, 2023/07/07
- [PULL 16/60] target/ppd: Remove unused define, Daniel Henrique Barboza, 2023/07/07
- [PULL 17/60] target/ppc: Get CPUState in one step, Daniel Henrique Barboza, 2023/07/07
- [PULL 18/60] target: ppc: Use MSR_HVB bit to get the target endianness for memory dump, Daniel Henrique Barboza, 2023/07/07
- [PULL 19/60] pnv/xive2: Fix TIMA offset for indirect access, Daniel Henrique Barboza, 2023/07/07
- [PULL 20/60] pnv/xive: Add property on xive sources to define PQ state on reset, Daniel Henrique Barboza, 2023/07/07
- [PULL 21/60] pnv/psi: Initialize the PSIHB interrupts to match hardware, Daniel Henrique Barboza, 2023/07/07
- [PULL 22/60] ppc/pnv: quad xscom callbacks are P9 specific, Daniel Henrique Barboza, 2023/07/07
- [PULL 23/60] ppc/pnv: Subclass quad xscom callbacks, Daniel Henrique Barboza, 2023/07/07
- [PULL 24/60] ppc/pnv: Add P10 quad xscom model, Daniel Henrique Barboza, 2023/07/07