Re: add a Verilog HDL syntax highlighting file

[Benno Schulenberg]

Op 07-01-2021 om 19:29 schreef Jorge Juan:
> El jue, 7 ene 2021 a las 11:12, Benno Schulenberg (<bensberg@telfort.nl>) 
> escribió:
>> However, the "rule" for including a syntax into nano is that the files that 
>> the syntax is for can be found on an average GNU/Linux install. Verilog 
>> files are not among those.
> 
> All these tools are native GNU/Linux tools and can be found pre-packaged in
> the most popular GNU/Linux distributions.

What distro do you use?  Please provide links to the relevant packages in
that distro, similar to this URL: https://packages.debian.org/sid/nano .

> An average GNU/Linux install for a hardware developer (most CS students take
> a course on Verilog or VHDL design at some point) will include a Verilog 
> simulator,

Especially students of computer science should be perfectly able to download
a syntax file from some web page and install it to color up their editing of
Verilog files.  No need to burden a default nano install with such a syntax.

Wouldn't it make more sense to include a Verilog syntax file for nano with
some major Verilog package?  Similar to what conky does:

https://fedora.pkgs.org/rawhide/fedora-x86_64/conky-1.11.6-1.fc33.x86_64.rpm.html

Or publish it on some wiki that many Verilog users visit?  As for Octave:

https://wiki.octave.org/Nano

> while the same CS students will probably never need syntax 
> highlighting for groff, email or ocaml, all included by default with nano.

Those syntaxes were there before I became maintainer.

> I think the syntax configuration I propose is much cleaner and richer than
> the previously proposed in Savannah, which is more a work-in-progress
> proposal.

Understood.

Benno

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