Re: add a Verilog HDL syntax highlighting file

[Benno Schulenberg]

Op 08-01-2021 om 19:35 schreef Jorge Juan:
> https://packages.debian.org/sid/iverilog
> https://packages.debian.org/sid/verilator
> https://packages.debian.org/sid/yosys

Okay.

>> Wouldn't it make more sense to include a Verilog syntax file for nano with
>> some major Verilog package?
>
> I do not think it can be compared. Would you expect ruby, python or
> gcc include syntax highlighting configuration for many text editors?

Python and Gcc are not comparable to Verilog: the first two are at least
two orders of magnitude more used than Verilog.  Why include a syntax in
nano by default for something that less than a percent of the users use?

> I understand that you may find Verilog not interesting enough to be
> included with nano. It is ok. I will probably publish the syntax as a
> gitlab snippet so it can be easily reached by interested users.

Unfortunately the Gitlab snippet (https://gitlab.com/-/snippets/2058705)
is unrechable without Javascript.  You may want to publish it in a place
that is more freely accessible.  Maybe on Savannah?

  https://savannah.gnu.org/patch/?group=nano

(It doesn't have to be a patch.  You can attach plain syntax files there.)

> In the
> meantime, I decided to rework the syntax file a bit more and I have a
> new version now supporting both Verilog and SystemVerilog.

Oh.  I wouldn't have done that.  I would have kept the two separated.

> In this version I use very long regular expressions to match the whole
> list of standard keywords. It make very long lines, which I do not
> really like, but it is easier to maintain and probably more efficient
> to parse.
Maybe more efficient for the regex coloring code, but in my opinion
/less/ maintainable because harder to read.

Benno

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